搜索资源列表
ongame
- 一个游戏 the hardware for the game includes a number of displays, each with a button and -- a light, that each represent a bin that can store marbles (beans). -- -- The display indicates the number of marbles in each bin at any given time. --
Sel
- JAVAscr ipt的一个选择类， 大家可以下载看看，这是我的一个作品！-JAVAscr ipt choice of a type, we can look at the downloaded, it is one of my works!
cbi
- 计算组合数公式C(ele,sel)=A(ele,sel)/sel! 不用递归实现，放心使用-calculation formula portfolio C (ele, sel) = A (ele, sel) / sel! Recursive not achieved, the use of confidence
tcm_8psk
- The Viterbi algorithm is the same as the binary case with one main difference: The survivor sequences include the uncoded bits, which are decided at each trellis stage when selecting one of two parallel branches with the largest correlation metric.
VX_DNP3.0
- 与保护、测控设备通讯的DNP3.0规约，与SEL公司部分产品完成通讯 Tornado2.0编译，无故障运行与研华HE-8XX系列主板3年以上 解压密码luckycy-and protection, monitoring and control equipment communications DNP3.0 Statute SEL with the completion of part of the company's communications products Tornado
lxa
- 将4MHz的访波输入到ccc模块上，输出500Hz提供鸣叫声频。1kHz的方波经fen10模块进行十分频后为秒模块mian、分模块mina、时模块hour，提供时钟信号；用sst模块为整点报时提供控制信号，（当59 50\"、52\"、54\"、56\"、58\"时，q500输出为”1”，秒为00时qlk输出为”1”,这两个信号经过逻辑或门实现报时功能）；用sel模块提供数码管片选信号；用模块bbb将对应数码管信号送出需要的显示信号；用七段译码器dispa模块进行译码。 将4MHz的访波输入
ddk_v1_11_00_00
- DSP/BIOS Driver Developer Kit 1.11 The DSP/BIOS Driver Developer Kit (DDK) provides a selection of pre-tested DSP/BIOS device drivers, and documentation on how to write a driver to the DSP/BIOS driver model, known as IOM. The DDK includes C source
seller_controler
- it s been design to help the ATM seller to sell the goods easily and convenience.-it's been design to help the ATM seller to sel l the goods easily and convenience.
sel
- 使用javascr ipt实现datagrid的复选框全选的功能。
sel
- matlab源程序,自适应中值滤波器算法
sel_comV1.3
- 美国sel系列继电保护通讯源码,非dnp协议,采用模拟超级终端实现,具有实时电量显示,保护动作记录,故障录波等功能.
自动售货机VHDL程序与仿真
- library ieee; use ieee.std_logic_arith.all; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity PL_auto1 is port ( clk:in std_logic; --系统时钟 set,get,sel,finish: in std_logic; --设定、买
用VHDL语言实现四人智力竞赛抢答器的设计
- 1、用feng模块将选手按下按键信号输出高电平给锁存模块lockb，进行锁存的同时发出aim信号实现声音提示，并使count模块进行答题时间的倒计时，在计满100妙后送出声音提示； 2、用ch41a模块将抢答结果转换为二进制数； 3、用sel模块产生数码管片选信号； 4、用ch42a模块将对应数码管片选信号，送出需要的显示信号； 5、用七段译码器dispa模块进行译码。
VHDL
- 采用VHDL语言设计一个4通道的数据采集控制模块。系统的功能描述如下： 1.系统主时钟为100 MHz。 2.数据为16位-数据线上连续2次00FF后数据传输开始。 3.系统内部总线宽度为8位。 4.共有4个通道（ch1、ch2、ch3、ch4），每个通道配备100 Bytes的RAM，当存满数据后停止数据采集并且相应通道的状态位产生报警信号。 5.数据分为8位串行输出，输出时钟由外部数据读取电路给出。 6.具备显示模块驱动功能。由SEL信号设置显示的通道，DISPLAY
state_machine
- 状态机的描述，基于EasyFPGAv1.04 用状态机描述流水灯，状态机在1s的周期下流水灯，方向又sel控制-Descr iption of state machine, based on the state machine described by EasyFPGAv1.04 water lights, state machine at the cycle 1s under water lights, direction and control of sel
siluqiangdaqi
- 1、用feng模块将选手按下按键信号输出高电平给锁存模块lockb，进行锁存的同时发出aim信号实现声音提示，并使count模块进行答题时间的倒计时，在计满100妙后送出声音提示； 2、用ch41a模块将抢答结果转换为二进制数； 3、用sel模块产生数码管片选信号； 4、用ch42a模块将对应数码管片选信号，送出需要的显示信号； 5、用七段译码器dispa模块进行译码。 -1, using feng module will press a key player to a
all-new-electronics-self-teaching-guide-wiley-sel
- This is a very good book on self learning electronics from Wiley publications and is very useful to understand basics of electronics for some one shifting from computer science to embedded system development
DS2020_2020_DS_20080530
- SEL DS2020 通讯管理装置通讯说明-SEL DS2020 UG
DSP
- DSP伺服控制系统软件设计，改进系统信号流囤，将软件模块与信号流图模块对应．以对软件进行增量 式搭建-The paper presents the way of Design about blocking software for Sel-VO control system based on DSP
SEL-551
- 美国SEL继电保护装置的技术说明书551很难弄到的呀，很实用的呀-U.S. SEL 551 relay device is difficult to get the technical specifications of ah, ah very useful