资源列表
CCD-driver
- CCD芯片驱动VHDL程序，CCD型号TC253SPD -CCD chip driver VHDL program, CCD models TC253SPD
tPad_Camera
- tPad DE2-115/70开发板可用的摄像头采集、显示程序，QT10.0以上环境可用，原装代码，可以进行修改加以使用，如使用到倒车影像系统中，视频显示等。-tPad DE2-115/70 development board available cameras capture, display program, QT10.0 over the environment is available, the original code can be modified to be used, such
jow_order
- 这是我准备电子设计大赛时，用VHDL写的一个自动打铃系统，很好的学习资料。-This is when I am going to Electronic Design Contest, use VHDL to write an automatic bell playing system, a very good learning materials.
sopc_uart_rt
- sopc的一个应用例程：应用uart部件搭建的一个sopc系统，调试成功了。包含所有源代码-An application of routine sopc: Application uart component erected a sopc system, commissioning a success. Contains all the source code
clk_vhdl
- Quartus II工程压缩文件，是一个典型的基于FPGA的数字钟工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based digital clock project, there are sub-50MHz frequency, counting, decoding modules. Using VHDL language.
qpsk
- qpsk调制解调的FPGA实现。QPSK为调制程序，QPSK-two为解调程序。-qpsk modulation and demodulation of the FPGA. QPSK as the modulation process, QPSK-two for the demodulation process.
Hardware_Multiplier
- 用VHDL写的硬件乘法器，以及测试过了，一个时钟周期内完成乘法运算。被乘数、乘数的宽度通过通用属性GENERIC参数改变而轻松改变，硬件除法器也快好了。-Written by VHDL hardware multiplier, and tested, and a clock cycle multiplication. Multiplicand, multiplier width parameter changes through the common property of GENERIC an
collect
- 用verilog编写的max197这个AD转换的程序，在ISE综合仿真均通过。-max197, verilog
Senior-Advanced-FPGA-design
- FPGA设计高级进阶，讲述了流水线，乒乓操作，异步时钟域处理，状态机等内容-Senior Advanced FPGA design, about the line, ping-pong operation, asynchronous clock domain processing, state machine, etc.
TSC2046_ILI9481_3.5HVGA
- 该程序为触摸屏IC TSC2046和HVGA驱动IC ILI9481的测试程序，采取标准C语言，keil环境下编译成。该程序已用到生产测试中。无错无警告。-TSC2046 and ILI9481 Driver IC program
LED_0000_9999
- 7段数码管动态显示0000-9999,vhdl语言-7-segment LED dynamic display of 0000-9999, the VHDL language
Mul_16
- 16位布思乘法器，实现两个16位二进制相乘，运行runallcode.bat文件可自动生成fsdb波形文件观察结果-16bits-multibly-16bits buth mutiplayer