资源列表
CommandResponse
- verilog语言写的sdram控制器—命令响应模块代码，经过测试，逻辑正确，可编译，可综合-verilog language written sdram controller-order response to the code, tested, logically correct, compiler, integrated
ram_dp_sr_sw
- VHDL源代码,资源多多共享,不懂的地方多多指教
frequency
- 一种等精度的频率计，同时适合高频和低频，误差小。-A precision frequency meter, etc. At the same time, suitable high-frequency and low frequency, the error small.
SPI
- SPI communications for ATmega128/ATmega2560 (native SPI and UART in SPI-mode).
FSM_test
- FSM_test for textbanch in vhdl-FSM_test
synplify_makefile
- synplify、ise和verdi在linux上的makefile；多个工具集成在一个文件管理，方便快捷，值得参考-the makefile for synplify, ise and verdi on Linux multiple tools integrated into a document management, convenient and valuable reference! ! !
PIC16F690OCM12232
- PIC16F690控制OCM12232液晶模块显示-PIC16F690 LCD module display control OCM12232
gf
- DDS use AD9852 with vhdl for director
STATE_9852
- FPGA控制DDS芯片AD9852，产生幅值和频率可调的正弦信号-FPGA control AD9852 state
a
- 在PC机上发送一个字符在单片机中的1602显示-In the PC sends a character in the single chip microcomputer 1602 display
DSP28_CpuTimers
- cpu定时器，DSP2812 配置，可以简化DSP2812 在CCS4.0中的配置-cpu timer
ad5764
- 数模转换器AD5764的Verilog HDL源程序，已在项目中验证了其可行。-DAC AD5764 Verilog HDL source code, and have verified its feasibility in the project.