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usart.rar
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order. ,USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
rd_wr_control
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
tx_buff
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
rec_buf
- USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
usart
- Usart model in vhdl code
usart
- USART universal Synchronous and Asynchronous Receiver and transmitter-USART universal Synchronous and Asynchronous Receiver and transmitter
RS232_Receive
- verilog RS232 串口接收建模-verilog RS232 usart
USART
- RS232串口通信的VERILOG代码，包含了测试文件，及参数文件，用户只需要修改参数文件里的参数即可满足不同的应用需求；由于串口逻辑比较简单，程序中没有注释；-RS232 serial communication VERILOG code contains the test files and parameter files, users only need to modify the parameters in the parameter file to meet different app
msp430x41x
- 低电源电压范围为1.8 V至3.6 V 超低功耗： - 主动模式：280μA，在1 MHz，2.2伏 - 待机模式：1.1μA - 关闭模式（RAM保持）：0.1μA 五省电模式 欠待机模式唤醒 超过6微秒 16位RISC架构， 125 ns指令周期时间 12位A/ D转换器具有内部 参考，采样和保持，并 AutoScan功能 16位Timer_B随着三† 或七‡ 捕捉/比较随着阴影寄存器 具有三个16位定时
fpga_uarst
- fpga USART通信，VHDL语言编写，通过测试。程序全面运用了状态机编程-The fpga the USARTs communications, VHDL language, pass the test. The entire process of the use of state machine programming
UART_FPGA
- usart for fpga,usart for fpga-usart for fpga,
USART
- uart with arm32f103v6
uartfifo
- FPGA采用FIFO实现UART，对于大量异步数据的采集传输很有帮助-A usart design of FPGA using fifo,it can be used in massed asychronous data collect.
uart1
- 使用VerilogHDL实现的一个串口，自己调试通过并实用-A usart program scr ipt with VerilogHDL program langrage, have used in applications!
IIC_and_usartPC
- fpga的IIC与USART串口verilog代码，非常实用-The IIC and USART serial fpga verilog code, test
vrilog-beep-usart-keyboard
- verilog beep usart keyboard开发板控制外设，数据很稳定，功能很强大-verilog beep usart keyboard development board control peripherals, data is very stable, very powerful
Verilog-Code-Receiver
- Verilog Code for Receiver USART
Verilog-Code-Transmitter
- Verilog Code for Transmitter USART
USART
- 基于USART的ARM与FPGA通信实验-Based on the ARM and FPGA communication experiment of USART
JY901
- ustartled控制代码,供测试使用，p10单元可用(usart Ustartled control code for test use, P10 unit available)