资源列表
an-8-bit-left-shift-register
- 使用VHDL语言设计一个8 位左移移位寄存器。并给出了仿真波形。-Using VHDL to design an 8-bit left shift register. And simulation waveforms.
eetop.cn_tcd1209
- TCD1209D 时序驱动采用VHDL语言-TCD1209 drive
ds18b20_seg7
- 基于 FPGA+ds18b20 温度计 设计 一ds18b20接受 数据 以数码管 显示温度-Designed based on FPGA+ Ds18b20 thermometer ds18b20 accept the data to the digital display temperature
QPSK_fpga
- QPSK调制和解调的FPGA实现，包括伪码生成等模块-QPSK modulation and demodulation of the FPGA, including the pseudo-code generation modules
EDAshipinchuli
- 采用FPGA芯片对，CCD摄像头的输出的模拟视频信号进行采集，转换为640*480分辨率的视频数据，并暂存于外部SRAM或SDRAM中-The FPGA chip, the output of the CCD camera analog video signal acquisition, converted to 640* 480 resolution video data, and temporarily stored in the external SRAM or SDRAM
scramble
- 在quartusII上已经验证过，很有用的并行加扰程序，用的语言为verilog，需要的可以拿去-Has already been verified in quartusII useful parallel scrambling procedure, the language used for Verilog, need to take look at
i2c
- i2c配置adv7180 将模拟信号转成数字信号bt656-i2c configuration adv7180
32-crc32
- 32位数据输入并行算法Verilog HDL代码。-32 bits of data input and parallel algorithm Verilog HDL code
usb2.0
- 将FPGA里的数据通过usb2.0端口，上传至上位机上-FPGA data usb2.0 port, upload the first bit machine
xapp1071
- 高速ADC及DAC接口的参考设计。在Xilinx FPGA上实现。-Reference design of xapp1071.
psram_controller
- PSRAM_CONTROLLER THE CONTROLLER IS USED FOR PSRAM AND AHB BUS IT HAVE FINISH SIMULATION OK FPGA VERIFY OK SYNTHSIS DESIGN COMPILER SPEED TO 200 mhz -THE CONTROLLER IS USED FOR PSRAM AND AHB BUS IT HAVE FINISH SIMULATION OK FPGA VERIFY OK SY
spi_ctrl
- spi总线的实现方式，包含测试激励，已验证通过。-spi bus, including incentives, has been verified.