资源列表
TURBO_2964
- 本程序只进行了2964 帧长的TPC编码-CtransfDlg::OnEncodeTPC2964(CString SrcFile,struct PARAMETER*PARAMETERDEAL)
CIC-UPSAMPLE
- CIC内插 内插系数可变，阶数1~6,Verilog版本-Inserted within the CIC interpolation factor variable, the order of 1 to 6, the Verilog version
4613m73a_nand_model
- File Descr iptions: --- --- --- nand_model.v -structural wrapper for nand_die_model nand_die_model.v -nand model of a single die nand_defines.vh -file used to generate correct port maps for nand_model instanciation. nand_parameters.vh -fi
rom
- 此包里有两个程序，其一为ROM存储器，其二为8位加法器-This bag has two programs, one for the ROM memory, and the second 8-bit adder
screw
- 基于FPGA的串行数据加解扰代码，用VHDL实现，可跑400M的速度。-FPGA-based serial data plus descrambling code using VHDL, and can run 400M speed.
test
- 利用VHDL 编程AD9910 产生DDS -Use of the VHDL programming AD9910 DDS
count_zj
- 基于FPGA的数字锁相环中环路滤波器的设计-FPGA digital PLL loop filter design
MCP4822
- SPI recever avr programing
MANCHESTER-ENCODING
- manchester encoding 波形-software for manchester encoding
digital-signal-processing-with--fpga
- 数字信号处理用FPGA实现，其中包含常见的FFT，滤波器，自相关等用VHDL和Verilog语言实现的-digital signal processing with fpga
FPGA_ad2s82
- 双通道AD2s82测角系统的FPGA控制器实现-FPGA controller for dual-channel AD2s82 angle measuring system
Active-power-filter
- 有源电力滤波器，用于实现无功治理与谐波补偿，精度很高-Active power filter for reactive power control and harmonic compensation, high accuracy