资源列表
OV7670_VGA
- 采用OV7670摄像头采样视频数据通过FPGA DE2开发板用VGA显示在显示屏上。-Using OV7670 camera video data sampled by FPGA DE2 development board with a VGA display on the screen.
ADS1278
- 这个程序实现AD采样芯片1278与FPGA的通信，按照datasheet上的时序编写。-This program implements 1278 AD sampling chip and FPGA communication, written in accordance with the timing on the datasheet.
s2
- ad9708与ad9280的程序，ad采集进来再da输出，在中间可以自行加一些算法。-ad9708 and ad9280 programs, ad collection come again da output, in the middle of some of the algorithms can add their own.
bt656_to_yuv422
- 从bt656数据流中提取出同步信号, 适合于搞fpga/cpld开发调式-bt656 internel sync to extern sync singal， bt656 internel sync to extern sync singal
sram_test_OK
- 主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动，SRAM型号为IS61LV25616，程序语言为Verilog,开发环境为quartusII 7.0,为一工程，可直接下载到FPGA中，含电路图-Mainly based on FPGA (EP2C8Q208I8) driving under the SRAM, SRAM model IS61LV25616, programming language for Verilog, a development environment for
lab28
- 采用5级流水线MIPS微处理器设计，实现32位流水线的算数、逻辑、以为等指令-pipeline MIPS
AD_sampling
- 基于Verilog的AD采样FPGA程序,如果使用的话，FPGA接口重新设置即可-AD Sampling verilog program that is based on FPGA，if used，the IO Pins of FPGA should be redifined
hdl
- spi verilog ad9628-spi verilog ad9628
code_lock_vhdl
- 在ISE环境下用vhdl写的一个密码锁程序。下载到xilinx 公司的 spartan6 的板子上验证过的，也有仿真代码。主要就是几个状态之间的转换，用了一个moore状态机。-In the ISE environment using vhdl to write a lock program. Downloaded to the board spartan6 xilinx' s proven, there are simulation code. Mainly the conversion
v
- Synthetisable verilog of compact crypto algorithms: RC4, TEA, XTEA, XXTEA. A faster but, more resource hungry version for RC4 and XXTEA is included.
sram_test
- 用Verilog写的SRAM测试程序，先向SRAM里面写数据，然后再将数据读出来做比较。-Written using Verilog SRAM test program, which Xianxiang SRAM write data, and then read out the data for comparison.
HSMB
- 基于Altera平台的SFP+光模块硬件代码-Based on Altera Platform, provided a 10G Optic XAUI to SFP+ controller