资源列表
PWM
- 程序PWM_rate1可以输出占空比可调的方波，并把占空比用数码管显示出来。-verilog pwm
8b10b
- 8b10b编解码，用于光通信和千兆以太网，verilog编写，已验证-8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified
UART_RX
- 232串口源程序 verilog实现，频率可调 接受部分-RS232 verilog
ads1252
- 用fpga控制ads1252采样，晶振高，速度快，采用的是同步模式，采样回来的前5个值不准，取值要从第6个值开始，第一位是标志位-With fpga control ads1252 sampling, crystal, high speed, using the synchronous mode, the first five sampling returned values are not allowed, ranging from the first six va
mux16
- 十六位乘法器的verilog hdl 实现 及 modelsim 仿真 环境为quartusii9.0 自动调用modelsim 6.5输出仿真结果-fpga verilog hdl modelsim quartusii 16-bit multiplier
Frequency_8bit
- 基于FPGA的8位数字频率计，经过本人验证，误差很小，结果通过数码管显示（完整的工程）-8 FPGA-based digital frequency meter, after I verified, the error is very small, the results through the digital display (complete works)
huffman
- 基于fpga的霍夫曼编码Huffman Encoder-Fpga-based Huffman coding Huffman Encoder
lcd18b20
- 用VHDL编写的关于用液晶1602来显示18B20温度传感器采集的温度的程序-VHDL, 1602 on the use of liquid crystal displays 18B20 temperature sensor temperature acquisition procedures
sbq
- 基于fpga和传统示波器工作方式的vhdl程序，通过ad0809采样信号（可兼容tlc5510）再经由8位da转换输出，同时输出外触发锯齿波，建议使用感性小的示波器探头，否则锯齿波低频时会出现失真-Fpga-based and traditional ways of working oscilloscope vhdl procedures, through ad0809 sampling signal (compatible tlc5510) and then through eight da
div
- FPGA的IP核中除法算法的源代码，是Verilog语言的，易于初学者的学习。-FPGA IP core in the division algorithm source code, Verilog language, easy for beginners to learn.
iic_sfp
- IIC SFP接口测试程序，Xilinx参考设计，ML507硬件测试通过-IIC SFP interface test code，Xilinx reference design，tested on ML507 platform.
FIR
- 基于matlab的自己编的fir滤波器，简单易懂的亲~适合新手-Own series based on the matlab fir filter, easy to understand for novice pro ~