资源列表
textio03
- 在QUARTUS II 下用 MODELSIM 仿真的例子，用TEXTIO文件进行仿真，带读取数据的文本文件，注释也比较详尽。对初学仿真有帮助。-In QUARTUS II with MODELSIM simulation examples, simulation with TEXTIO file, a text file with read data, comments are more detailed. Simulation helpful for beginners.
DigitalFM
- 用VHDL编写的一个全数字FM调谐接收机的源代码和详细资料，原文是英文，已经翻译成中文。 -One using VHDL digital FM tuner receiver source code and detailed information, the original is in English, has been translated into Chinese.
Crack_QII_13.1_Windows
- quartus 13.1 的破解文件 最新版本的破解文件-quartus 13.1 crack file latest version of the crack file
Crack_QII_13.1_linux_ALL
- quartus 13.1 linux 的破解文件 最新版本的破解文件-quartus 13.1 linux crack file latest version of the crack file
divide
- 用veriog实现的任意位数的除法，在modelism中验证过了已经。-Implementation division with verilog.
bt656_decode
- bt656 标准的解码 verilog 语言-bt656 decode
mult-64bit-booth.txt
- 64位booth乘法器，verilog HDL， zip文件，modelsim测试通过-64 booth multiplier, verilog HDL, zip files, modelsim test
huxideng
- 基于VHDL的呼吸灯设计， 可设置4个频率分别为0.1 ，0.2，0.4 0.5MHZ，quartus软件亲测可用-VHDL-based design breathing light can be set to four frequencies were 0.1, 0.2,0.4 0.5MHZ, quartus software pro-test available
ADS1271
- VHDL的接口程序 24-bit 105ksps ADC 型号是：ADS1271 绝对稳定-VHDL interface program 24-bit 105ksps ADC models are: ADS1271 absolutely stable
Design
- 基于FPGA的64QAM调制解调进行了研究和验证-64 qam modulation demodulation based on FPGA is studied and validated
SPI-Master-Core-DAC-ADC-spartan
- SPI Master Core for spartan (ADC, DAC) vhdl code
SineWAve
- xilinx system generator DAC simulink system code for black box